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always order by complete part number data sheet 29319.100i full-bridge power mosfet controller ? for automotive applications 3940 the a3940klp and a3940klw are designed specifically for automotive applications that require high-power motors. each provides four high-current gate drive outputs capable of driving a wide range of n-channel power mosfets in a full-bridge configuration. bootstrap capacitors are utilized to provide the above-battery supply voltage required for n-channel fets. an internal charge pump for the high side allows for dc (100% duty cycle) operation of the bridge. protection features include supply under/overvoltage, thermal shutdown, and motor lead short-to-battery and short-to-ground fault notification, and a programmable dead-time adjustment for cross- conduction prevention. the overvoltage trip point is user adjustable. the a3940 is supplied in a choice of two power packages, a 28-pin tssop with an exposed thermal pad (package type lp), and a 28-pin wide-body soic (package type lw). both package types are available in lead (pb) free versions, with 100 % matte-tin leadframe plating (suffix ?t). features ? ? ? ? ? drives wide range of n-channel mosfets ? ? ? ? ? charge pump to boost gate drive at low-battery-input conditions ? ? ? ? ? bootstrapped gate drive with charge pump for 100% duty cycle ? ? ? ? ? synchronous rectification ? ? ? ? ? fault diagnostic output ? ? ? ? ? adjustable dead-time cross-conduction protection ? motor lead short-to-battery and short-to-ground protection ? undervoltage/overvoltage protection ? ? ? ? ? -40c to +150c, t j operation ? ? ? ? ? thermal shutdown absolute maximum ratings load supply voltage range, vbb, vdrain, cp1 .......... -0.6 v to +40 v output voltage ranges, lss .............................. -2 v to +6.5 v gha/ghb, v ghx ........ -2 v to +55 v sa/sb, v sx .................. -2 v to +45 v gla/glb, v glx .......... -2 v to +16 v ca/cb, v cx .............. -0.6 v to +55 v cp2,vcp, vin .......... -0.6 v to +52 v logic input/output voltage range v in , v out ................... -0.3 v to +6.5 v operating temperature range, t a ........................... -40c to +135c junction temperature, t j ......... +150c* storage temperature range, t s ........................... -55c to +150c * fault conditions that produce excessive junction temperature will activate device thermal shutdown circuitry. these conditions can be tolerated, but should be avoided. a3940klp (tssop with exposed thermal pad) a3940klw (soic) approx. 2x actual size. 4 3 2 1 8 5 12 11 10 9 2 1 2 2 2 3 2 4 1 7 2 0 1 5 1 6 2 7 2 8 14 13 1 9 1 8 2 5 2 6 6 7 4 3 2 1 8 5 12 11 10 9 2 1 2 2 2 3 2 4 1 7 2 0 1 5 1 6 2 7 2 8 14 13 1 9 1 8 2 5 2 6 6 7 part number pb-free package a3940klp-t yes 28-pin tssop a3940klp ? 28-pin tssop a3940klw-t yes 28-pin soicw a3940klw ? 28-pin soicw
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 2 functional block diagram copyright ? 2003 allegro microsystems, inc. see pages 7 and 8 for terminal assignments and descriptions.
3940 full-bridge power mosfet controller www.allegromicro.com 3 * measured on ?high-k? multi-layer pwb per jedec standard jesd51-7. ? measured on typical two-sided pwb . a3940klw (soic) a3940klp (tssop) the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro products are not authorized for use as critical components in life-support devices or systems without express written approval. the information included herein is believed to be accurate and reliable. however, allegro microsystems, inc. assumes no responsi- bility for its use; nor for any infringement of patents or other rights of third parties which may result from its use.
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 4 electrical characteristics: unless otherwise noted at t a = -40c to +135c, t j = -40c to +150c, v in v bb = 7 v to 40 v, c p = 0.47 f, c r = 1 f, c reg5 = 0.1 f, c reg13 = 10 f, c boot = 0.1 f, pwm = 22.5 khz square wave. limits characteristics symbol conditions min typ max units power supply v bb quiescent current i bb reset = 1, v bb = v in = 40 v, v in v cp , ? 4.8 7.0 ma coast, stopped, cp disabled, i dead = 170 a reset = 1, v bb = v in = 15 v, v in v cp , ? 4.3 7.0 ma coast, stopped, cp disabled, i dead = 170 a reset = 1, v bb = v in = 40 v, v in v cp , coast, ? 5.0 7.0 ma stopped, i dead = 170 a, i cp = 0 ma reset = 1, v bb = v in = 15 v, v in v cp , coast, ? 4.8 7.0 ma stopped, i dead = 170 a, i cp = 0 ma reset = 1, v bb = v in = 40 v, v in v cp , coast, ? 35.4 40.0 ma stopped, i dead = 170 a, i cp = 15 ma reset = 1, v bb = v in = 15 v, v in v cp , coast, ? 35.1 40.0 ma stopped, i dead = 170 a, i cp = 15 ma reset = 0 ? ? 1.0 a vreg5 output voltage v reg5 no load 4.5 5.0 5.5 v vreg5 line regulation v reg5 i reg5 = 4.0 ma ? 5.0 ? mv vreg5 load regulation v reg5 i reg5 = 0 - 4.0 ma, v bb = 40 v ? 5.0 ? mv vreg5 short-circuit current i reg5m v bb = 40 v, v reg5 = 0 ? 28 ? ma vcp output voltage level v cp v bb = 14 - 40 v, i cp = 15 ma v bb +9.5 v bb +10.7 v bb +11.8 v v bb = 7 v, i cp = 15 ma 11.7 13 13.8 v vcp gate drive i cp sr = 1, mode = 0, enable = pwm 15 ? ? ma vcp output voltage ripple v cp(pp) i cp = 15 ma, v bb = 14 v - 40 v ? 500 ? mv vcp pump-up time t up v in = v cp , v bb = 14 v - 40 v ? 2.5 ? ms v in = v cp , v bb = 7 v ? 3.5 ? ms vreg13 quiescent input current i reg13 reset = 1, v bb = v in = 40 v, coast, stopped ? 1.4 ? ma vreg13 output voltage v reg13 v in = 15 v, no load 12.6 13.3 14.0 v vreg13 dropout voltage v regdv i reg13 = 15 ma, v in = 11 v - 14 v ? 0.7 ? v vreg13 line regulation v reg13 v in = 15 v - 40 v, i reg13 = 15 ma ? 2.0 ? mv vreg13 load regulation v reg13 v in = 40 v, i reg13 = 0 - 15 ma ? 2.0 ? mv vreg13 short-circuit current i reg13m v in = 40 v, v reg13 = 0 (pulse) ? 60 ? ma go-to-sleep response time t sleep reset = 0 to v reg5 = 4 v 10 30 ? s wake-up response time t wake reset = 1 to v reg13 , uv cleared ? 1.4 ? ms notes: typical data is for design information only. negative current is defined as coming out of (sourcing) the specified device terminal. continued next page ?
3940 full-bridge power mosfet controller www.allegromicro.com 5 continued next page ? electrical characteristics: unless otherwise noted at t a = -40c to +135c, t j = -40c to +150c, v in v bb = 7 v to 40 v, c p = 0.47 f, c r = 1 f, c reg5 = 0.1 f, c reg13 = 10 f, c boot = 0.1 f, pwm = 22.5 khz square wave. limits characteristics symbol conditions min typ max units control logic logic input voltage v in(1) high level input (logic 1), except reset. 2.0 ? ? v v in(1) high level input (logic 1) for reset 2.2 ? ? v v in(0) low level input (logic 0) ? ? 0.8 v logic input current i in(1) v in = 2.0 v ? 40 100 a i in(0) v in = 0.8 v, except reset(0) ? 16 40 a i in(0) v in = 0.8 v, reset(0) ? ? 1.0 a gate drives, ghx, glx ( internal source or upper switch stages) output high voltage v dsl(h) ghx: i xu = -10 ma, v sx = 0 v reg13 - 2.2 ? v reg13 v glx: i xu = -10 ma, v lss = 0 v reg13 - 0.2 ? v reg13 v source current (pulsed) i xu v sdu = 10 v, t j = 25c ? 700 ? ma v sdu = 10 v, t j = 135c 400 ? ? ma source on resistance r sdu(on) i xu = -150 ma, t j = 25c 4.0 ? 13 ? i xu = -150 ma, t j = 135c 7.0 ? 23 ? source load rise time t r measure v dsl , 20% to 80%, c l = 3300 pf ? 90 ? ns gate drives, ghx, glx ( internal sink or lower switch stages) output low voltage v dsl(l) ghx: i xl = 10 ma, v sx = 0 ? ? 150 mv glx: i xl = 10 ma, v lss = 0 ? ? 150 mv sink current (pulsed) i xl v dsl = 10 v, t j = 25c ? 800 ? ma v dsl = 10 v, t j = 135c 550 ? ? ma sink on resistance r dsl(on) i xl = +150 ma, t j = 25c 1.8 ? 6.0 ? i xl = +150 ma, t j = 135c 3.0 ? 7.5 ? sink load fall time t f measure v dsl , 80% to 20%, c l = 3300 pf ? 70 ? ns gate drives, ghx, glx (general) propagation delay t pd logic input to unloaded ghx, glx ? ? 225 ns output skew time t sk(o) grouped by rising or falling edge ? ? 50 ns dead time t dead long = 0, r dead = 12.1 k ? (i dead = 167 a) 0.3 ? ? s (shoot-through prevention) long = 0, r dead = 499 k ? (i dead = 4 a) ? ? 11.0 s between ghx, glx transitions long = 1, r dead = 12.1 k ? (i dead = 167 a) 8.3 ? ? s of same phase long = 1, r dead = 499 k ? (i dead = 4 a) ? ? 345 s notes: typical data is for design information only. negative current is defined as coming out of (sourcing) the specified device terminal. for gh x : v sdu = v cx ? v ghx , v dsl = v ghx ? v sx , v dsl(h) = v cx ? v sdu ? v sx . for gl x : v sdu = v reg ? v glx , v dsl = v glx ? v lss , v dsl(h) = v reg ? v sdu ? v lss.
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 6 electrical characteristics: unless otherwise noted at t a = -40c to +135c, t j = -40c to +150c, v in v bb = 7 v to 40 v, c p = 0.47 f, c r = 1 f, c reg5 = 0.1 f, c reg13 = 10 f, c boot = 0.1 f, pwm = 22.5 khz square wave. limits characteristics symbol conditions min typ max units bootstrap circuit diode forward current limit i cx 3 v < [(v reg13 = 13.5 v) - v cx ] < 12 v 140 ? 1000 ma diode forward drop v f i f = 10 ma 0.8 ? 2.0 v diode resistance r f r f (100) = [v f (150) - v f (50)]/100 1.5 ? 6.5 ? top-off cp source current at cx icx v cx - v sx = 8 v, v bb = 40 v, ghx = 1(no load) 40 ? ? a fault logic vbb undervoltage v bb(uv) decreasing v bb 4.5 5.25 6.0 v vbb undervoltage hysteresis ? v bb(uv) v bb(recovery) - v bb(uv) 200 450 700 mv vreg13 undervoltage v reg13(uv) decreasing v in 7.5 8.25 9.0 v vreg13 undervoltage hyst. ? v reg13(uv) v reg13(recovery) - v reg13(uv) 200 450 700 mv vbb overvoltage v bb(ov) increasing v bb , fault = 0 to 1, v ovset = 0 v 16 19.6 22 v increasing v bb , fault = 0 to 1, v ovset = 0.45 v 24 28 30.5 v increasing v bb , fault = 0 to 1, v ovset = 0.9 v 32.5 36.4 39 v vbb overvoltage hysteresis ? v bb(ov) v bb(ov) - v bb(recovery) 2.1 3.1 4.1 v ovset input current i set(ov) 0 v < v set(ov) < 0.9 v ? ? 1.4 a vdsth input current i dsth 0.3 v < v dsth < 3 v ? ? 1.0 a short-to-ground threshold v stg(th) v dsth = 0.3 v v dsth -0.14 ? v dsth +0.10 v v dsth = 1.0 v v dsth -0.18 ? v dsth +0.13 v v dsth = 3.0 v v dsth -0.39 ? v dsth +0.26 v short-to-battery threshold v stb(th) v dsth = 0.3 v v dsth -0.20 ? v dsth +0.30 v v dsth = 1.0 v v dsth -0.24 ? v dsth +0.30 v v dsth = 3.0 v v dsth -0.37 ? v dsth +0.30 v v drain /open bridge threshold v do(th) if v drain < v do(th) , fault = 0 to 1 1.0 ? 3.0 v v drain /open bridge current i vdrain reset = 0 ? ? 1.0 a reset = 1, v dsth < 3 v ? ? 500 a fault latch clear pulsewidth t latch reset = 0, pulse 0.15 ? 2.0 s fault clear propagation delay t pd from reset = 1 to fault = 0 ? 2.0 ? s fault detection noise filter t noise ? 1.7 ? s fault output v out(0) i out = 5 ma, faults negated ? ? 0.4 v i out(1) v out = 5 v, open-drain, fault asserted ? ? 1.0 a thermal shutdown temperature t j t j increasing ? 172 ? c thermal shutdown hysteresis ? t j t j decreasing ? 12 ? c notes: typical data is for design information only. negative current is defined as coming out of (sourcing) the specified device terminal. y
3940 full-bridge power mosfet controller www.allegromicro.com 7 terminal functions terminal terminal name function number vdrain kelvin connection to mosfet high-side drains 1 lss gate-drive source return, low-side 2 glb gate-drive b output, low-side 3 sb motor phase b input 4 ghb gate-drive b output, high-side 5 cb bootstrap capacitor b 6 vin regulated 13 v gate drive supply input 7 vreg13 regulated 13 v gate drive supply output 8 ca bootstrap a capacitor 9 gha gate-drive a output, high-side 10 sa motor phase a input 11 gla gate-drive a output, low-side 12 vbb battery supply 13 cp2 charge pump connection for pumping capacitor 14 vcp charge pump output 15 cp1 charge pump connection for pumping capacitor 16 gnd common ground and dc supply returns electrically connected to exposed thermal pad of lp package 17 fault open-drain fault output 18 ovset dc input, overvoltage threshold setting for v bb 19 vreg5 regulated 5 v supply output 20 mode control input 21 sr control input 22 enable control input 23 phase control input 24 reset control input 25 long control input, long or short deadtime 26 idead adjust current for basic deadtime 27 vdsth dc input, drain-to-source monitor threshold voltage 28
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 8 terminal descriptions ca/cb. high-side connection for bootstrap capacitor, positive supply for high-side gate drive. the bootstrap capacitor is charged to v reg13 ? 1.5 v when the output sx terminal is low. when the output swings high, the voltage on this terminal rises with the output to provide the boosted gate voltage needed for n- channel power mosfets. reset. control input to put device into minimum power consumption mode and to clear latched faults. logic ?1? enables the device; logic ?0? triggers the sleep mode. internally pulled down via 50 k ? resistor. enable. logic ?1? enables direct control of the output drivers via the phase input, as in pwm controls, and ignores the mode and sr inputs. internally pulled down via 50 k ? resistor. mode. logic input to set the current decay mode. logic ?1? (slow-decay mode) switches off the high-side mosfet in response to a pwm ?off? command. logic ?0? (fast-decay mode) switches off both the high-side and low-side mosfets. internally pulled down via 50 k ? resistor. phase. motor direction control. when logic ?1?, enables gate drive outputs gha and glb allowing current flow from sa to sb. when logic ?0?, enables ghb and gla allowing current flow from sb to sa. internally pulled down via 50 k ? resistor. sr. when logic ?1?, enables synchronous rectification; logic ?0? disables the synchronous rectification. internally pulled down via 50 k ? resistor. fault. open drain, diagnostic logic output signal. when logic ?1?, indicates that one or more fault conditions have occurred. use an external pullup resistor to vreg5 or to digital controller. internally causes a coast when asserted. see also functional description, next page. idead. analog current set by resistor (12 k ? 3940 full-bridge power mosfet controller www.allegromicro.com 9 functional description motor lead protection. a fault detection circuit monitors the voltage across the drain to source of the external mosfets. a fault is asserted ?high? on the output terminal, fault, if the drain-to-source voltage of any mosfet that is instructed to turn on is greater than the voltage applied to the v dsth input terminal. when a high-side switch is turned on, the voltage from v drain to the appropriate motor phase output, v sx , is examined. if the motor lead is shorted to ground the measured voltage will exceed the threshold and the fault terminal will go ?high?. similarly, when a low-side mosfet is turned on, the differen- tial voltage between the motor phase (drain) and the lss terminal (source) is monitored. v dsth is set by a resistor divider to v reg5 . to prevent erroneous motor faults during switching, the fault circuitry will wait two dead times after every pwm/phase change before monitoring the drain-to-source voltage; except, it will use one dead time for (1) a long coast to any phase on, or (2) a long hi-z before on for that phase. this allows time for the motor output voltage to settle before checking for motor fault when using slow rise/fall gate-control waveforms. the v drain is intended to be a kelvin connection for the high-side, drain-source monitor circuit. voltage drops across the power bus are eliminated by connecting an isolated pcb trace from the v drain terminal to the drain of the mosfet bridge. this allows improved accuracy in setting the v dsth threshold voltage. the low-side, drain-source monitor uses the lss terminal, rather than v drain , in comparing against v dsth . fault states. the fault terminal provides real time indication of fault conditions after some digital noise filtering. the v drain fault acts as if a short-to-ground fault existed on every motor phase. bridge (or motor) faults are latched but cleared by a reset = 0 pulse or by power cycling. ghx = glx = 0 during reset = 0. the undervoltage, overvoltage, and thermal shutdown faults are not latched and will not reset until the cause is eliminated. all faults cause, via the fault line, a coast and some cause shutdown of the regulators, as in the fault responses table (next page). note: as a test mode, if the thermal shutdown or sleep has not occurred and the fault output is externally held low, the coast mode and regulator shutdowns will not occur if motor or voltage faults occur. do not wire-or this terminal to other fault lines. dead time. the a3940 is intended to drive a wide range of power mosfets in applications requiring a wide range of switching times. in order to prevent cross conduction (a.k.a. shoot-through) during direction and pwm changes, a power mosfet must be turned off before its ?phase-pin mate? is turned on. t dead (ns) = k([18.8r dead (k )] + 50) + 90 where k = 1 for long = 0; k = 32 for long = 1. note: i dead (ma) 2/r dead (k ), 12 k 10 s to charge the bootstrap capacitors and avoid a possible short-to-ground fault indication.
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 10 functional description (cont?d) control logic phase enable mode sr gla glb gha ghb sa sb mode of operation 0 1 x x 1 0 0 1 lo hi reverse 0 0 0 1 0 1 1 0 hi lo fast decay, sr enabled 0 0 1 1 1 1 0 0 lo lo slow decay, braking mode 0 0 0 0 0 0 0 0 z z fast decay, coast 0 0 1 0 1 0 0 0 lo z slow decay, sr disabled 1 1 x x 0 1 1 0 hi lo forward 1 0 0 1 1 0 0 1 lo hi fast decay, sr enabled 1 0 1 1 1 1 0 0 lo lo slow decay, braking mode 1 0 0 0 0 0 0 0 z z fast decay, coast 1 0 1 0 0 1 0 0 z lo slow decay, sr disabled notes: all faults will coast the motor, i.e., gha = ghb = gla = glb = 0 to switch off all bridge mosfets. x = indicates a ?don?t care?. z = indicates a high-impedance state. fault responses fault mode reset fault cp reg. vreg13 vreg5 ghx glx no fault 1 0 on on on ? ? short-to-battery "# 1 1 on on on 0 0 short-to-ground "$ 1 1 on on on 0 0 open bridge (v drain ) "% 1 1 on on on 0 0 v reg13 undervoltage 1 1 on on & on 0 ' 0 ' v bb overvoltage 1 1 on on on 0 0 v bb undervoltage 1 1 off off on & 0 ' 0 ' thermal shutdown 1 1 off off on & 0 ' 0 ' sleep 0 1 off off off z z notes: " = these faults are latched but will clear during reset = 0 pulse. ghx = glx = 0 during reset = 0, except see ' . other faults will not clear except when their cause is removed. # = short-to-battery can only be detected when the corresponding glx = 1. $ = short-to-ground can only be detected when the corresponding ghx = 1. % = bridge fault appears as a short-to-ground fault on all motor phases. & = not instructed off but may be low voltage because of the fault indicated. ' = during undervoltage conditions, the low sides of ghx and glx are instructed to be ?on? so that the outputs are low = 0; however, with v reg13 < 4 v, the outputs will start to open (become high impedance). see ?sleep mode?.
3940 full-bridge power mosfet controller www.allegromicro.com 11 a3940klp (tssop) dimensions in millimeters (controlling dimensions) dimensions in inches (for reference only) notes: 1. exact body and lead configuration at vendor?s option within limits shown. 2. lead spacing tolerance is non-cumulative. 3. supplied in standard sticks/tubes of 50 devices or add ?tr? to part number for tape and reel.
3940 full-bridge power mosfet controller 115 northeast cutoff, box 15036 worcester, massachusetts 01615-0036 (508) 853-5000 12 a3940klw (soic) dimensions in millimeters (controlling dimensions) dimensions in inches (for reference only) notes: 1. lead spacing tolerance is non-cumulative. 2. exact body and lead configuration at vendor?s option within limits shown. 3. supplied in standard sticks/tubes of 27 devices or add ?tr? to part number for tape and reel.

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